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7.2: an output-level contract for gate, trigger and clock (high +4 to +12 V into 100 kOhm, low <= +0.5 V; trigger >= 1 ms caught at an input; clock each state >= 1 ms, rate stated), receiver thresholds in their own column with 0.5 V hysteresis recommended; impedance limits (<= 2 kOhm source, >= 47 kOhm load) beside the typical figures and a statement of which cells are limits; MOD-CV defaults to B5 and names a Hz/V scaling; MOD-CV-1VOCT takes U10 and U5, defaults to B10, and holds 1.00 V/octave within 0.3 % of scale, 0 V at C0 = 16.35 Hz recommended; MOD-VIDEO ceiling -0.1 to +1.2 V with a 30 pF input recommendation; class ceilings by range; one unipolar allowance; the range rule a recommendation everywhere; timing pulses on patch jacks classed and SIG-015's edge stated. 6.6: BUS-CV from an op-amp through <= 100 Ohm into >= 100 kOhm listeners. 7.1: the damage test's source impedance, +-15 V recommended, and every 3.5 mm socket recommended to survive a mono plug; direction in_out defined. 7.4: a picture jack is an Annex I port everywhere, the reference is black burst or video sync (Terms, Annex M agree), bi-level line level 300 mV p-p, waveform per format family, +-5 % on terminations, loop-through bridging >= 10 kOhm || <= 20 pF, ST 240 for tri-level; the removed identifiers named once. 7.3: HD columns say the front porch runs to 0H and the sync column is the positive half, the card draws tri-level, V front convention and ST 274's 4.5 lines stated, 480p/576p sourced to CTA-861, the contract claim limited to the fifteen rows it covers, exact rates. Annex I: Y 1.3 V p-p with tri-level, IEC 60933-5 for Y/C, VID-RGBS / VID-RGSB / VID-RGBHV split, phantom power and polarity, headphone, stereo TRS, S/PDIF, AES3, ADAT, USB audio, DIN clock pins and PPQN, word clock per AES11, DMX XLR-3 note and RJ45, MIDI 3.3 V option and thru, 6G/12G-SDI, LINK; bibliography and normative references follow (ST 240, CTA-861, BT.470-7 2005). Annex H shows every class; the level-map card reads the data. Claim schema: formats only on VID- ports, bandwidth and delay per path (from), phase_ns per format. card.cite rejects a removed row; the levels figure cites V75-015; removed rows carry no measurement figure; BUS-020 names the directional features; VID-002 reworded for both directions; SIG-014's clipping criterion; relocked. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com> |
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|---|---|---|
| .forgejo/workflows | ||
| annex | ||
| data | ||
| figures | ||
| spec | ||
| tests | ||
| tools | ||
| .gitignore | ||
| CONTRIBUTING.md | ||
| COPYRIGHT.md | ||
| LICENSE | ||
| LICENSE-CODE | ||
| pyproject.toml | ||
| README.md | ||
| standard.json | ||
Eurorack Interface Specification (EIS)
EIS is a free, open specification for Eurorack hardware. It says what modules, enclosures, bus boards, power supplies, and cables owe each other so that products from different makers fit, power up, and patch together. A rule is a shall only where two products would otherwise fail to work together; everything else is written "EIS recommends". Every requirement has an identifier, a product type, and a machine-readable model behind it.
Get it: lzxindustries.net/eis has the PDF, a design reference for each product type, and the machine-readable models to download, and every clause as a web page with a URL for each requirement. In this repository, start at Scope or, to design a product, at the designer's guide.
Claim it: a product states its product type and any feature in one line, EIS draft, module (VID-REF-IN), and can keep what it publishes in a claim file that eis claim eis-claim.yaml validates.
Change it: open an issue or a pull request at git.lzxindustries.net/lzx/eurorack-specification. CONTRIBUTING.md says what belongs in EIS and how a change is made. A proposal for a new shall names the two products that would stop working together without it.
| Identifier | EIS |
| Status | Working draft |
| Edition | v0.1.0 |
| Maintainer | LZX Industries |
| License | CC BY 4.0 on the specification, MIT on the tooling; details in COPYRIGHT.md |
| SPDX | CC-BY-4.0 (specification), MIT (code) |
Document map
| Clause | Page | Read it when you design |
|---|---|---|
| Foreword | spec/foreword.md |
Edition, status, change summary, errata |
| 1 Scope | spec/scope.md |
|
| 2 Normative references | spec/normative-references.md |
|
| 3 Terms | spec/terms.md |
The words with a special meaning |
| 4 Conformance | spec/conformance.md |
Product types, features, the claim file |
| 4.4 Requirements register | spec/requirements.md |
Every requirement, generated |
| 5.1 Rack dimensions | spec/rack.md |
The 19-inch frame a row sits in |
| 5.2 Modules | spec/modules.md, front panels, boards |
A module, its panel, or its boards |
| 5.3 Rails, inserts, and mounting screws | spec/rails.md |
What makes a panel fit a row |
| 5.4 Enclosures | spec/enclosures.md |
The case a module mounts in |
| 6.1 Power architecture | spec/power-architecture.md |
The power domains, sources, distribution, entries, and the rules for every domain |
| 6.2 Power supplies and power converters | spec/power-supplies.md |
Protection, published ripple, the ripple limit of each domain |
| 6.3 Grounding and 0 V | spec/grounding.md |
The 0 V reference, protective earth, and joining cases |
| 6.4 The bus | spec/bus-power.md |
PWR-BUS: rails, header, pinout, marking, keying, and a module on the bus |
| 6.5 Bus boards | spec/bus-boards.md |
Capacity, links, ribbons |
| 6.6 Bus CV and gate | spec/bus-cv-gate.md |
The 16-pin CV and gate nets |
| 6.7 12 V DC power (PWR-DC12) | spec/dc-12.md |
Feature PWR-DC12: a barrel or multi-pin DC entry and the DC rail it feeds |
| 6.8 ±6 V analog power (PWR-A6) | spec/analog-6.md |
Feature PWR-A6: the A6-VH3 entry, its voltage window, sources, and cables |
| 6.9 ±15 V analog power (PWR-A15) | spec/analog-15.md |
Feature PWR-A15: the A15-MF4 entry, its voltage window, sources, and cables |
| 7.1 Signals | spec/signals.md |
The port list and patch safety |
| 7.2 Patch signal classes | spec/modular-signals.md |
Audio, control CV, pitch CV, gate, trigger, clock, and video on patch jacks, and their ranges |
| 7.3 Video timing | spec/video-timing.md |
The formats a video reference port lists |
| 7.4 Video on 75 Ω coaxial jacks (VID-75) | spec/video-75.md |
The 75 Ω coaxial interface: the video reference ports VID-REF-IN, VID-REF-OUT, VID-REF-PASSTHRU, VID-REF-LOOPTHRU, the reference tree, and the coaxial cable |
| 8.1 USB service port and parameter interface (CTRL-USB) | spec/ctrl-usb.md |
Feature CTRL-USB: the USB service port and the MIDI 2.0 parameter interface |
| 8.2 Host bridge protocol | spec/host-bridge.md |
The host bridge protocol a case host offers a computer |
| 9 Assembling a system | spec/assembly.md |
The rules for whoever fits a row together |
| Annexes A to Q | annex/ |
Informative: rail and insert catalogs, survey, verification, planning aids, rationale, worked examples |
| Bibliography | spec/bibliography.md |
Machine-readable models
data/ holds the register and every normative number: requirements.json, the mechanical models, signals.json, video_timings.json, video_75.json, and dc_12.json. A product's claim file follows data/claim.schema.json; the examples are in data/examples/.
The market survey behind Annex F and the catalog rail sections behind Annexes A to D are in the separate eis-reference repository. They are informative and do not size anything EIS requires; a copy of the survey is kept in data/survey/ so that Annex F builds here alone. Third-party documents are not stored here; data/sources.json records each one the specification cites.
Tooling
pip install -e ".[build,test]" installs one command, eis:
| Command | Does |
|---|---|
eis check |
Runs every generator and check (python -m pytest tests) |
eis gen |
Rewrites the generated pages, tables, and figure cards |
eis build pdf, refs, site, or all |
Builds build/eis.pdf, the design references build/eis-ref-<type>.pdf, and the static site |
eis claim FILE |
Validates a claim file and prints its claim line |
Every subcommand is a script under tools/. Figure cards in figures/ follow one house style, tools/card.py. CI builds the PDFs and the site on every push, and a tag v* publishes them at lzxindustries.net/eis (CONTRIBUTING.md).